It is often useful to observe the internal signals of a circuit for purposes of debugging and/or verification. With respect to integrated circuits (ICs) such as, e.g., programmable ICs, one technique relies upon probes that are inserted into the physical implementation of the circuit within the programmable IC. Probes are implemented using the programmable logic elements of the programmable IC that are otherwise available for implementing the circuit to be probed, also referred to as the design under test (DUT). The probes can be instantiated within the DUT at user-selected locations.
Typically, each probe conveys a state or a value of a particular signal, e.g., the particular signal being probed, at a given clock cycle. This information can be provided to a logic analyzer. The logic analyzer can be instantiated within the programmable IC to operate cooperatively with the DUT. In this manner, signals of interest within the programmable IC can be collected by probes and routed to the “in-circuit” logic analyzer within the programmable IC for retention and subsequent analysis.
The probes and logic analyzer typically are programmable, general purpose components. This means that each probe may be configured to monitor any of a variety of different signals. The programmable nature of each probe, however, means that each probe requires a significant amount of circuit resources of the programmable IC to implement. Likewise, the logic analyzer will have a level of complexity and size commensurate with the programmability of the probes. This often limits a designer's ability to probe different portions of a DUT as the available resources on the programmable IC are simply insufficient to support the desired number of probes. This is particularly true with larger DUTs that require significant circuit resources of the programmable IC.